A program control mechanism is required in any multi-processor system. Multi-processor signal processing systems that process signals on a sample-by-sample basis often use a data flow driven process control. In data flow driven control the operation of individual processors is triggered by the arrival of data samples from an upstream processor. If multiple samples are required for processing in data flow driven control a mechanism such as a scoreboard is used to determine when all the required data has arrived.
Multi-processor systems where the processors access shared memory blocks are usually controlled by a central controller that implements a complex arbitration scheme. The central controller determines which processors can access a particular memory block depending on priorities and in order to avoid memory conflicts. A processor requests access to required memory blocks and access is granted depending on what other blocks the process has requested access to as well as the memory blocks that other processors have requested access to.
In digital television broadcasting channel decoders for some transmission standards may be implemented using simple data flow control. In the U.S., the standard for terrestrial transmission is trellis coded 8-level Vestigial Side-band (8-VSB) modulation prescribed by the Advanced Television Systems Committee (ATSC) and cable transmission will probably use the same standard. Using this standard, a multi-processing channel decoders can be provided in which only a few samples are required for processing in any processor and control can be data driven. TDA8961 from Philips Semiconductors, MCT 2100 from Motorola, NXT2000 from NXTWave Communications are examples of 8-VSB channel decoders.
There are other digital television broadcasting standards where channel decoding algorithms are organized as a cascade of repetitive arithmetic operations on data in large memory blocks. In Europe, the Digital Video Broadcasting (DVB) group prescribes three different standards DVB-S, DVB-C and DVB-T for satellite, cable and terrestrial broadcasting respectively. The modulation scheme used in Europe for these DVB standards is Coded Orthogonal Frequency Division Multiplexing (OFDM). For terrestrial broadcasting, Japan has adapted Bandwidth Segmented Transmission (BST) Orthogonal Frequency Division Multiplexing (OFDM) which is similar to COFDM. OFDM requires block based processing in channel decoding, in which processors share access to the same memory blocks, so that, arbitration of memory access is required. VLSI's VES9600 and LSI Logic's L64780 are examples of DVB-T channel decoders.
Those skilled in the art are directed to U.S. Pat. No. 5,685,005 to Garde which discloses a multi-processor system with arbitration control of shared memory access.
The above citations are hereby incorporated herein in whole by reference.